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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2020-02-19 15:15:51 +0100
committerDavid S. Miller <davem@davemloft.net>2020-02-20 15:00:31 -0800
commitac2fcfa9fd26db67d7000677c05629c34cc94564 (patch)
tree8a5c0f13e8ac268fbcc653cee874e91d95da2b50 /net
parent0d5b8d7055652fd6b079671d00fa78fcd0e2cd7c (diff)
net: macb: Properly handle phylink on at91rm9200
at91ether_init was handling the phy mode and speed but since the switch to phylink, the NCFGR register got overwritten by macb_mac_config(). The issue is that the RM9200_RMII bit and the MACB_CLK_DIV32 field are cleared but never restored as they conflict with the PAE, GBE and PCSSEL bits. Add new capability to differentiate between EMAC and the other versions of the IP and use it to set and avoid clearing the relevant bits. Also, this fixes a NULL pointer dereference in macb_mac_link_up as the EMAC doesn't use any rings/bufffers/queues. Fixes: 7897b071ac3b ("net: macb: convert to phylink") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
0 files changed, 0 insertions, 0 deletions