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authorVincent Cheng <vincent.cheng.xh@renesas.com>2019-10-31 23:20:07 -0400
committerDavid S. Miller <davem@davemloft.net>2019-11-03 17:35:40 -0800
commit3a6ba7dc7799355557938fbdc15a558236011429 (patch)
treed510891ff54c4983d838001a81af1f8551b09a54 /net
parent5c5e7aac63ae1af56a50fa743983c96a99d7620d (diff)
ptp: Add a ptp clock driver for IDT ClockMatrix.
The IDT ClockMatrix (TM) family includes integrated devices that provide eight PLL channels. Each PLL channel can be independently configured as a frequency synthesizer, jitter attenuator, digitally controlled oscillator (DCO), or a digital phase lock loop (DPLL). Typically these devices are used as timing references and clock sources for PTP applications. This patch adds support for the device. Co-developed-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Vincent Cheng <vincent.cheng.xh@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
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