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authorAlexander Sverdlin <alexander.sverdlin@nokia.com>2019-03-19 17:18:07 +0000
committerMiquel Raynal <miquel.raynal@bootlin.com>2019-04-01 14:36:23 +0200
commit2b75ebeea6f4937d4d05ec4982c471cef9a29b7f (patch)
treec5cd30e3b77e5d96b0a125a6ca5979b015ad8691 /net
parent706707341bef5b076e7c271a2dab7e6cd6af7902 (diff)
mtd: spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write
It was observed that reads crossing 4K address boundary are failing. This limitation is mentioned in Intel documents: Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: "5.26.3 Flash Access Program Register Access: * Program Register Accesses are not allowed to cross a 4 KB boundary..." Enhanced Serial Peripheral Interface (eSPI) Interface Base Specification (for Client and Server Platforms): "5.1.4 Address For other memory transactions, the address may start or end at any byte boundary. However, the address and payload length combination must not cross the naturally aligned address boundary of the corresponding Maximum Payload Size. It must not cross a 4 KB address boundary." Avoid this by splitting an operation crossing the boundary into two operations. Fixes: 8afda8b26d01 ("spi-nor: Add support for Intel SPI serial flash controller") Cc: stable@vger.kernel.org Reported-by: Romain Porte <romain.porte@nokia.com> Tested-by: Pascal Fabreges <pascal.fabreges@nokia.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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