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authorYang Shi <yang.shi@linaro.org>2016-05-16 16:36:26 -0700
committerDavid S. Miller <davem@davemloft.net>2016-05-17 14:03:33 -0400
commit4c1cd4fdfd14ecd417962f8c2166506132697f7c (patch)
tree14fba1a53e6426a3e4c12773dacd5fe81780b3b3 /net/qrtr
parentcd9e2e5d3ff148be9ea210f622ce3e8e8292fcd6 (diff)
bpf: arm64: remove callee-save registers use for tmp registers
In the current implementation of ARM64 eBPF JIT, R23 and R24 are used for tmp registers, which are callee-saved registers. This leads to variable size of JIT prologue and epilogue. The latest blinding constant change prefers to constant size of prologue and epilogue. AAPCS reserves R9 ~ R15 for temp registers which not need to be saved/restored during function call. So, replace R23 and R24 to R10 and R11, and remove tmp_used flag to save 2 instructions for some jited BPF program. CC: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Signed-off-by: Yang Shi <yang.shi@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/qrtr')
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