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authorValentin Longchamp <valentin.longchamp@epfl.ch>2010-01-21 18:55:32 +0100
committerBen Dooks <ben-linux@fluff.org>2010-01-24 15:25:56 +0000
commita1ee06b72968d80ab9362ec61143c4f090cc2d1b (patch)
treeae31134e2069a7d82377dbffa5a10b449c2e7575 /net/atm/raw.c
parent92dcffb916d309aa01778bf8963a6932e4014d07 (diff)
i2c: mxc: let time to generate stop bit
After generating the stop bit by changing MSTA from 1 to 0, the i2c_imx->stopped was immediatly set to 1. The second test on i2c_imx->stopped then is correct and the controller never waits if the bus is busy. This patch corrects this. On mx31moboard, stop bit was not generated on single write transfers. This was kept unnoticed as other transfers are made afterwards that help the write recipient to resynchronize. Thanks to Philippe and Michael for the debugging. Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off by: Philippe Rétornaz <philippe.retornaz@epfl.ch> Reported-by: Michael Bonani <michael.bonani@epfl.ch> Acked-by; Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'net/atm/raw.c')
0 files changed, 0 insertions, 0 deletions