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authorJames Cleverdon <jamesclv@us.ibm.com>2005-11-05 17:25:53 +0100
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-14 19:55:13 -0800
commit6004e1b7effcbb385a6b7c790e4b8008682cf679 (patch)
treeb22c05874deeee6ee7ec75f98746717db5830d8d /mm
parent89b831ef8bf5cfbb357dbc0a2e07700d7f20eec5 (diff)
[PATCH] i386/x86-64: Share interrupt vectors when there is a large number of interrupt sources
Here's a patch that builds on Natalie Protasevich's IRQ compression patch and tries to work for MPS boots as well as ACPI. It is meant for a 4-node IBM x460 NUMA box, which was dying because it had interrupt pins with GSI numbers > NR_IRQS and thus overflowed irq_desc. The problem is that this system has 270 GSIs (which are 1:1 mapped with I/O APIC RTEs) and an 8-node box would have 540. This is much bigger than NR_IRQS (224 for both i386 and x86_64). Also, there aren't enough vectors to go around. There are about 190 usable vectors, not counting the reserved ones and the unused vectors at 0x20 to 0x2F. So, my patch attempts to compress the GSI range and share vectors by sharing IRQs. Cc: "Protasevich, Natalie" <Natalie.Protasevich@unisys.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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