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authorGeert Uytterhoeven <geert+renesas@glider.be>2021-05-10 14:07:55 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-05-13 17:08:29 +0200
commit2ea2e019c190ee3973ef7bcaf829d8762e56e635 (patch)
tree1ded56f678bc8c23dc9e58974e62811a6469c2e8 /mm/util.c
parent5e722b217ad3cf41f5504db80a68062df82b5242 (diff)
serial: sh-sci: Fix off-by-one error in FIFO threshold register setting
The Receive FIFO Data Count Trigger field (RTRG[6:0]) in the Receive FIFO Data Count Trigger Register (HSRTRGR) of HSCIF can only hold values ranging from 0-127. As the FIFO size is equal to 128 on HSCIF, the user can write an out-of-range value, touching reserved bits. Fix this by limiting the trigger value to the FIFO size minus one. Reverse the order of the checks, to avoid rx_trig becoming zero if the FIFO size is one. Note that this change has no impact on other SCIF variants, as their maximum supported trigger value is lower than the FIFO size anyway, and the code below takes care of enforcing these limits. Fixes: a380ed461f66d1b8 ("serial: sh-sci: implement FIFO threshold register setting") Reported-by: Linh Phung <linh.phung.jy@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: stable <stable@vger.kernel.org> Link: https://lore.kernel.org/r/5eff320aef92ffb33d00e57979fd3603bbb4a70f.1620648218.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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