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authorSimon Horman <horms+renesas@verge.net.au>2019-03-25 17:35:51 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-04-02 09:50:48 +0200
commit10d9ea5100c89afd677a202036e0e34e129a6c52 (patch)
tree8d2e6c4f2701568ac3b13048556dc89989a4be26 /mm/pagewalk.c
parent20cc05ba04a93f05d6c50789fe35d762a2db4e96 (diff)
clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset
Parameterise the offset of control bits within the FRQCRC register for Z and Z2 clocks. This is in preparation for supporting the Z2 clock on the R-Car E3 (r8a77990) SoC which uses a different offset for control bits to other, already, supported SoCs. As suggested by Geert Uytterhoeven. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'mm/pagewalk.c')
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