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authorVille Syrjälä <ville.syrjala@linux.intel.com>2020-10-08 13:16:06 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2020-10-12 14:23:22 -0400
commit214bba50616f65264dfc30d095daef3ab7500f52 (patch)
tree9dd82332af99571c3631931ce8740e38c5247190 /lib/rhashtable.c
parentf0b707c125a2e228bcc047cd46040943bef61931 (diff)
drm/i915: Set all unused color plane offsets to ~0xfff again
When the number of potential color planes grew to 4 we stopped setting all unused color plane offsets to ~0xfff. The code still tries to do this, but actually does nothing since the loop limits are bogus. skl_check_main_surface() actually depends on this ~0xfff behaviour as it will make sure to move the main surface offset below the aux surface offset because the hardware AUX_DIST must be a non-negative value [1], and for simplicity it doesn't bother checking if the AUX plane is actually needed or not. So currently it may end up shuffling the main surface around based on some stale leftover AUX offset. The skl+ plane code also just blindly calculates the AUX_DIST whether or not the AUX plane is actually needed by the hw or not, and that too will now potentially use some stale AUX surface offset in the calculation. Would seem nicer to guarantee a consistent non-negative AUX_DIST always. So bring back the original ~0xfff offset behaviour for unused color planes. Though it doesn't seem super likely that this inconsistency would cause any real issues. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201008101608.8652-1-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com> (cherry picked from commit 79148ce4b25d418327feca8abb2f7392d49f5259) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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