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authorBrice Goglin <Brice.Goglin@inria.fr>2019-10-28 10:11:18 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2019-11-07 15:46:52 +0100
commit4caa525b783b0abe7bc06e41220b337ba311bbf7 (patch)
treee070414ae0cb7c1af48d01c16755c227443afa06 /lib/locking-selftest-spin.h
parentcf8741ac57ed48613e49559d3e5ae43f56291e4c (diff)
ACPI: HMAT: don't mix pxm and nid when setting memory target processor_pxm
On systems where PXMs and nids are in different order, memory initiators exposed in sysfs could be wrong: On dual-socket CLX with SNC enabled (4 nodes, 1 and 2 swapped between PXMs and nids), node1 would only get node2 as initiator, and node2 would only get node1. With this patch, we get node1 as the only initiator of itself, and node2 as the only initiator of itself, as expected. This should likely go to stable up to 5.2. Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'lib/locking-selftest-spin.h')
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