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authorDong Aisheng <aisheng.dong@nxp.com>2017-05-19 15:05:43 +0800
committerLinus Walleij <linus.walleij@linaro.org>2017-05-22 11:05:19 +0200
commit5586ee4191219f74632ad6e527c46d1c3d9cdf3e (patch)
treed96338efd6ffa2f91556f2195cb357212e93d557 /lib/iov_iter.c
parenta5cadbbb081cb84a9fdb14391fb461a41f089a0a (diff)
pinctrl: imx: add soc specific mux_mode mask and shift property
MX7ULP MUX mode mask and shift bit is different from VF610. Let's make it a platform specific property for the later easy of adding MX7ULP support. One trick in exist code that Vybrid hardcoded the config part as 0xffff because its mux_config register BIT[15-0] are all configs part. But it's not true in ULP, so use mux_mask instead to address the difference. Cc: Stefan Agner <stefan@agner.ch> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'lib/iov_iter.c')
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