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authorAlexander Duyck <alexander.h.duyck@intel.com>2012-03-28 08:03:43 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-04 03:18:22 -0700
commitd0bfcdfd484229c63c16cf5787a9e4211a61cc26 (patch)
tree759982bb2e2c0e81987145cb498358f4cfd8568f /lib/div64.c
parenta4d4f629167ceb7ed0d7c5811d32ee75afe10612 (diff)
ixgbe: Reorder the ring to q_vector mapping to improve performance
This change reorders the mapping of rings to q_vectors in the case that the number of rings exceeds the number of q_vectors. Previously we would allocate the first R/N queues to the first q_vector where R is the number of rings and N is the number of q_vectors. Instead of doing this we can do a better job of interleaving the rings to the CPUs by assigning every Nth ring to the q_vector. The below tables illustrate this change for the R = 16 N = 4 case. Before patch After patch q_vector: 0 1 2 3 0 1 2 3 Rings: 0 4 8 12 0 1 2 3 1 5 9 13 4 5 6 7 3 6 10 14 8 9 10 11 4 7 11 15 12 13 14 15 This should improve the performance for both DCB or ATR when the number of rings exceeds the number of q_vectors allocated by the adapter. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'lib/div64.c')
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