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| author | Dmitry Osipenko <digetx@gmail.com> | 2019-05-02 02:38:02 +0300 |
|---|---|---|
| committer | MyungJoo Ham <myungjoo.ham@samsung.com> | 2019-08-24 20:11:12 +0900 |
| commit | ed2a8dd22a752af60282af38a47d26b227f772a7 (patch) | |
| tree | 8c01f28d3b64fd47546ed883684e688bca8ae391 /lib/ctype.c | |
| parent | efe9043db49649c1f6c21df8a3860689c2035911 (diff) | |
PM / devfreq: tegra: Replace write memory barrier with the read barrier
The write memory barrier isn't needed because the BUS buffer is flushed
by read after write that happens after the removed wmb(), we will also
use readl() instead of the relaxed version to ensure that read is indeed
completed.
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'lib/ctype.c')
0 files changed, 0 insertions, 0 deletions