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authorNicolas Pitre <nico@cam.org>2006-07-01 21:29:32 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-01 21:29:32 +0100
commit2dc7667b9d0674db6572723356fe3857031101a4 (patch)
tree39a69f5928bd052de309ffc4df288642f70b0f89 /kernel
parent3f8efdbe73a5bc96e006b2379a8c8d1d8ef52a9d (diff)
[ARM] 3541/2: workaround for PXA27x erratum E7
Patch from Nicolas Pitre According to the Intel PXA27x Processor Family Specification Update document (doc.nr. 280071-009) erratum E7, some care must be taken to locate the disabling and re-enabling of the MMU to the beginning of a cache line to avoid problems in some circumstances. Credits to Simon Vogl <simon.vogl@researchstudios.at> for bringing this up. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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