diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-11-19 17:43:17 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-12-19 11:50:56 -0800 |
| commit | 91f3bf0d5315ea3f139ae440f2b7772ecdcd67ec (patch) | |
| tree | c50dd66600a8851c00bf41ade5a38e683d06fc7b /kernel/relay.c | |
| parent | 7a110b9107ed8fe27277988cdb4d18e7043b7252 (diff) | |
clk: at91: sama7g5: register cpu clock
Register CPU clock as being the master clock prescaler. This would
be used by DVFS. The block schema of SAMA7G5's PMC contains also a divider
between master clock prescaler and CPU (PMC_CPU_RATIO.RATIO) but the
frequencies supported by SAMA7G5 could be directly received from
CPUPLL + master clock prescaler and the extra divider would do no work in
case it would be enabled.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-12-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'kernel/relay.c')
0 files changed, 0 insertions, 0 deletions