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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 14:20:02 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 14:20:02 +0100
commitceb0885d3b01bb2e2f18765770e212914f2864be (patch)
tree0952c90cd49704a9172e985ca491d79b60c40bc8 /include
parentb31fc7af78e17b0203e1cd5a195c590e8adeae0d (diff)
parent08458ef6eede6cf7d5a33c3a7c8bcdc3943012c2 (diff)
Merge branch 'misc' into devel
Conflicts: arch/arm/mm/init.c
Diffstat (limited to 'include')
-rw-r--r--include/linux/amba/mmci.h10
-rw-r--r--include/linux/amba/serial.h3
2 files changed, 9 insertions, 4 deletions
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 7e466fe72025..ca84ce70d5d5 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -15,9 +15,10 @@
* @ocr_mask: available voltages on the 4 pins from the block, this
* is ignored if a regulator is used, see the MMC_VDD_* masks in
* mmc/host.h
- * @translate_vdd: a callback function to translate a MMC_VDD_*
- * mask into a value to be binary or:ed and written into the
- * MMCIPWR register of the block
+ * @vdd_handler: a callback function to translate a MMC_VDD_*
+ * mask into a value to be binary (or set some other custom bits
+ * in MMCIPWR) or:ed and written into the MMCIPWR register of the
+ * block. May also control external power based on the power_mode.
* @status: if no GPIO read function was given to the block in
* gpio_wp (below) this function will be called to determine
* whether a card is present in the MMC slot or not
@@ -29,7 +30,8 @@
struct mmci_platform_data {
unsigned int f_max;
unsigned int ocr_mask;
- u32 (*translate_vdd)(struct device *, unsigned int);
+ u32 (*vdd_handler)(struct device *, unsigned int vdd,
+ unsigned char power_mode);
unsigned int (*status)(struct device *);
int gpio_wp;
int gpio_cd;
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index 5a5a7fd62490..e1b634b635f2 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -38,10 +38,12 @@
#define UART01x_FR 0x18 /* Flag register (Read only). */
#define UART010_IIR 0x1C /* Interrupt indentification register (Read). */
#define UART010_ICR 0x1C /* Interrupt clear register (Write). */
+#define ST_UART011_LCRH_RX 0x1C /* Rx line control register. */
#define UART01x_ILPR 0x20 /* IrDA low power counter register. */
#define UART011_IBRD 0x24 /* Integer baud rate divisor register. */
#define UART011_FBRD 0x28 /* Fractional baud rate divisor register. */
#define UART011_LCRH 0x2c /* Line control register. */
+#define ST_UART011_LCRH_TX 0x2c /* Tx Line control register. */
#define UART011_CR 0x30 /* Control register. */
#define UART011_IFLS 0x34 /* Interrupt fifo level select. */
#define UART011_IMSC 0x38 /* Interrupt mask. */
@@ -84,6 +86,7 @@
#define UART010_CR_TIE 0x0020
#define UART010_CR_RIE 0x0010
#define UART010_CR_MSIE 0x0008
+#define ST_UART011_CR_OVSFACT 0x0008 /* Oversampling factor */
#define UART01x_CR_IIRLP 0x0004 /* SIR low power mode */
#define UART01x_CR_SIREN 0x0002 /* SIR enable */
#define UART01x_CR_UARTEN 0x0001 /* UART enable */