diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-02-07 12:30:16 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-02-07 12:30:16 -0800 |
| commit | b34f01f76a10386f1877181e4f0631fa2733ecdc (patch) | |
| tree | c20cc19d0421cd9f7b9a7d6d57a3f89d03a74a41 /include | |
| parent | e0f121c5cc2cf079d13ebe65b490ca88ba6abe12 (diff) | |
| parent | 057b52b4b3d58f4ee5944171da50f77b00a1bb0d (diff) | |
Merge tag 'linux-watchdog-5.6-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
- add IT8786 chipset ID
- addition of sam9x60 compatible watchdog
- da9062 improvements
- fix UAF in reboot notifier handling in watchdog core code
- other fixes and small improvements
* tag 'linux-watchdog-5.6-rc1' of git://www.linux-watchdog.org/linux-watchdog:
watchdog: da9062: make restart handler atomic safe
watchdog: mtk_wdt: mt2712: Add reset controller
watchdog: mtk_wdt: mt8183: Add reset controller
dt-bindings: mediatek: mt2712: Add #reset-cells
dt-bindings: mediatek: mt8183: Add #reset-cells
dt-bindings: watchdog: da9062: add suspend disable option
watchdog: it87_wdt: add IT8786 ID
watchdog: dw_wdt: ping watchdog to reset countdown before start
watchdog: fix UAF in reboot notifier handling in watchdog core code
watchdog: cadence: Skip printing pointer value
watchdog: qcom: Use platform_get_irq_optional() for bark irq
watchdog: da9062: add power management ops
watchdog: make DesignWare watchdog allow users to set bigger timeout value
drivers: watchdog: stm32_iwdg: set WDOG_HW_RUNNING at probe
watchdog: sama5d4_wdt: addition of sam9x60 compatible watchdog
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/reset-controller/mt2712-resets.h | 22 | ||||
| -rw-r--r-- | include/dt-bindings/reset-controller/mt8183-resets.h | 17 |
2 files changed, 39 insertions, 0 deletions
diff --git a/include/dt-bindings/reset-controller/mt2712-resets.h b/include/dt-bindings/reset-controller/mt2712-resets.h new file mode 100644 index 000000000000..9e7ee762f076 --- /dev/null +++ b/include/dt-bindings/reset-controller/mt2712-resets.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Yong Liang <yong.liang@mediatek.com> + */ + +#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2712 +#define _DT_BINDINGS_RESET_CONTROLLER_MT2712 + +#define MT2712_TOPRGU_INFRA_SW_RST 0 +#define MT2712_TOPRGU_MM_SW_RST 1 +#define MT2712_TOPRGU_MFG_SW_RST 2 +#define MT2712_TOPRGU_VENC_SW_RST 3 +#define MT2712_TOPRGU_VDEC_SW_RST 4 +#define MT2712_TOPRGU_IMG_SW_RST 5 +#define MT2712_TOPRGU_INFRA_AO_SW_RST 8 +#define MT2712_TOPRGU_USB_SW_RST 9 +#define MT2712_TOPRGU_APMIXED_SW_RST 10 + +#define MT2712_TOPRGU_SW_RST_NUM 11 + +#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2712 */ diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset-controller/mt8183-resets.h index 8804e34ebdd4..a1bbd41e0d12 100644 --- a/include/dt-bindings/reset-controller/mt8183-resets.h +++ b/include/dt-bindings/reset-controller/mt8183-resets.h @@ -78,4 +78,21 @@ #define MT8183_INFRACFG_AO_I2C7_SW_RST 126 #define MT8183_INFRACFG_AO_I2C8_SW_RST 127 +#define MT8183_INFRACFG_SW_RST_NUM 128 + +#define MT8183_TOPRGU_MM_SW_RST 1 +#define MT8183_TOPRGU_MFG_SW_RST 2 +#define MT8183_TOPRGU_VENC_SW_RST 3 +#define MT8183_TOPRGU_VDEC_SW_RST 4 +#define MT8183_TOPRGU_IMG_SW_RST 5 +#define MT8183_TOPRGU_MD_SW_RST 7 +#define MT8183_TOPRGU_CONN_SW_RST 9 +#define MT8183_TOPRGU_CONN_MCU_SW_RST 12 +#define MT8183_TOPRGU_IPU0_SW_RST 14 +#define MT8183_TOPRGU_IPU1_SW_RST 15 +#define MT8183_TOPRGU_AUDIO_SW_RST 17 +#define MT8183_TOPRGU_CAMSYS_SW_RST 18 + +#define MT8183_TOPRGU_SW_RST_NUM 19 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8183 */ |