diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2016-06-12 16:26:40 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-08-25 08:32:34 -0500 |
commit | 8b2ec318eece89be5e33d5313a25461a55a3177a (patch) | |
tree | 96adee8ae73a95035e7d523214c8674b026377ee /include | |
parent | eec097d43100a8195fd4f678671ecd5d986dd675 (diff) |
PCI: Add PTM clock granularity information
The PTM Control register (PCIe r3.1, sec 7.32.3) contains an Effective
Granularity field:
This provides information relating to the expected accuracy of the PTM
clock, but does not otherwise affect the PTM mechanism.
Set the Effective Granularity based on the PTM Root and any intervening PTM
Time Sources.
This does not set Effective Granularity for Root Complex Integrated
Endpoints because I don't know how to figure out clock granularity for
them. The spec says:
... system software must set [Effective Granularity] to the value
reported in the Local Clock Granularity field by the associated PTM
Time Source.
but I don't know how to identify the associated PTM Time Source. Normally
it's the upstream bridge, but an integrated endpoint has no upstream
bridge.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pci.h | 1 | ||||
-rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 9e4b6d6f3c8d..7256f33b6a15 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -371,6 +371,7 @@ struct pci_dev { #ifdef CONFIG_PCIE_PTM unsigned int ptm_root:1; unsigned int ptm_enabled:1; + u8 ptm_granularity; #endif #ifdef CONFIG_PCI_MSI const struct attribute_group **msi_irq_groups; diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 72bbe1491cbf..d812172d1d7b 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -969,6 +969,7 @@ #define PCI_PTM_CAP 0x04 /* PTM Capability */ #define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */ #define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */ +#define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */ #define PCI_PTM_CTRL 0x08 /* PTM Control */ #define PCI_PTM_CTRL_ENABLE 0x00000001 /* PTM enable */ #define PCI_PTM_CTRL_ROOT 0x00000002 /* Root select */ |