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authorAndre Przywara <andre.przywara@arm.com>2020-03-24 13:23:47 +0000
committerDavid S. Miller <davem@davemloft.net>2020-03-24 16:33:05 -0700
commit5fff0151b3244dc1ef9df7a5d1c0f79eb42599d7 (patch)
treec3001db78200601e31a121455f9df8326f777d83 /include
parentf735c40ed93ccaeb52d026def47ac1a423df7133 (diff)
net: axienet: Allow DMA to beyond 4GB
With all DMA address accesses wrapped, we can actually support 64-bit DMA if this option was chosen at IP integration time. If the IP has been configured for an address width greater than 32 bits, we assume the full 64 bit DMA width is working. In practise this will be limited by the actual system address bus width, which will ideally be the same as the DMA IP address width. If this is not the case, the actual width can still be configured using a dma-ranges property in the parent of the MAC node. This increases the DMA mask on those systems to let the kernel choose buffers from memory at higher addresses. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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