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authorAaron Sierra <asierra@xes-inc.com>2014-08-15 16:07:48 -0500
committerScott Wood <scottwood@freescale.com>2014-09-03 18:02:55 -0500
commit26ae4980b5e4739af93543a147facb421fb78ae8 (patch)
tree4b55ed53a77faf19c57885652c1923b818d7eee0 /include
parent67e35c3a79b7349a9b0dbe1dd0bf82def0296714 (diff)
fsl_ifc: Fix csor_ext position in fsl_ifc_regs
According to Freescale manuals, the IFC_CSORn_EXT register is located immediately _after_ the bank's IFC_CSORn register. This patch adjusts the csor_ext member of and reserved register arrays immediately surrounding the csor_cs structure to provide proper access to this register. Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Acked-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/fsl_ifc.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
index f49ddb1b2273..84d60cb841b1 100644
--- a/include/linux/fsl_ifc.h
+++ b/include/linux/fsl_ifc.h
@@ -781,13 +781,13 @@ struct fsl_ifc_regs {
__be32 amask;
u32 res4[0x2];
} amask_cs[FSL_IFC_BANK_COUNT];
- u32 res5[0x17];
+ u32 res5[0x18];
struct {
- __be32 csor_ext;
__be32 csor;
+ __be32 csor_ext;
u32 res6;
} csor_cs[FSL_IFC_BANK_COUNT];
- u32 res7[0x19];
+ u32 res7[0x18];
struct {
__be32 ftim[4];
u32 res8[0x8];