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authorMichael Chan <michael.chan@broadcom.com>2018-11-15 03:25:40 -0500
committerDavid S. Miller <davem@davemloft.net>2018-11-15 09:37:15 -0800
commitffd77621700ec3adcf859681e24910c38e0931f5 (patch)
tree061a41a006ca4bbcad2a6d02fd84f7e7731bf843 /include/scsi/osd_protocol.h
parentaddd4df6d763556e16d5316e4e8cd441050cc2af (diff)
bnxt_en: Workaround occasional TX timeout on 57500 A0.
Hardware can sometimes not generate NQ MSIX with a single pending CP ring entry. This seems to always happen at the last entry of the CP ring before it wraps. Add logic to check all the CP rings for pending entries without the CP ring consumer index advancing. Calling HWRM_DBG_RING_INFO_GET to read the context of the CP ring will flush out the NQ entry and MSIX. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/scsi/osd_protocol.h')
0 files changed, 0 insertions, 0 deletions