diff options
| author | Lars-Peter Clausen <lars@metafoo.de> | 2019-03-26 15:40:03 +0200 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2019-04-04 20:20:58 +0100 |
| commit | 5cd66239574df8b1aa4ed73e6b5ed3f51eda9057 (patch) | |
| tree | abeac8bfc484ad26c08963a5042f9f471df00f5e /include/linux/iio/frequency | |
| parent | 89c16919a0781308db6ca45e51a995e67cd90367 (diff) | |
iio: frequency: ad9523: Fix typo in ad9523_platform_data
Replace diff_{m1,m2} with div_{m1,m2} since they are dividers and not a
differential settings.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'include/linux/iio/frequency')
| -rw-r--r-- | include/linux/iio/frequency/ad9523.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/iio/frequency/ad9523.h b/include/linux/iio/frequency/ad9523.h index 12ce3ee427fd..621b93c0bcf9 100644 --- a/include/linux/iio/frequency/ad9523.h +++ b/include/linux/iio/frequency/ad9523.h @@ -129,8 +129,8 @@ enum cpole1_capacitor { * @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63. * @pll2_freq_doubler_en: PLL2 frequency doubler enable. * @pll2_r2_div: PLL2 R2 divider, range 0..31. - * @pll2_vco_diff_m1: VCO1 divider, range 3..5. - * @pll2_vco_diff_m2: VCO2 divider, range 3..5. + * @pll2_vco_div_m1: VCO1 divider, range 3..5. + * @pll2_vco_div_m2: VCO2 divider, range 3..5. * @rpole2: PLL2 loop filter Rpole resistor value. * @rzero: PLL2 loop filter Rzero resistor value. * @cpole1: PLL2 loop filter Cpole capacitor value. @@ -176,8 +176,8 @@ struct ad9523_platform_data { unsigned char pll2_ndiv_b_cnt; bool pll2_freq_doubler_en; unsigned char pll2_r2_div; - unsigned char pll2_vco_diff_m1; /* 3..5 */ - unsigned char pll2_vco_diff_m2; /* 3..5 */ + unsigned char pll2_vco_div_m1; /* 3..5 */ + unsigned char pll2_vco_div_m2; /* 3..5 */ /* Loop Filter PLL2 */ enum rpole2_resistor rpole2; |