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authorArnd Bergmann <arnd@arndb.de>2019-09-03 23:15:56 +0200
committerArnd Bergmann <arnd@arndb.de>2019-09-03 23:16:39 +0200
commitf02bd65a5b63bbc8cfbe65073005909833b72bb5 (patch)
tree1f60baf2d2acb5a4f0e1d69ff7206020dc81ac75 /include/dt-bindings
parenta3829f9952ba3c774f719ee67f131c9854e9b652 (diff)
parentb09d116b787a4ee2587a631baf2532738a5ce833 (diff)
Merge tag 'amlogic-dt64-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: Amlogic updates for v5.4 (round 2) - new board: Khadas VIM3L (SM1/S905D3 SoC) - support power domains on G12[AB] and SM1 SoCs - DT binding fixups based on YAML schema - add a bunch of remote control keymap - enable DVFS on SM1/SEI610 board * tag 'amlogic-dt64-2.1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (44 commits) arm64: dts: meson-sm1-sei610: add stdout-path property back arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: khadas-vim3: add support for the SM1 based VIM3L dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi arm64: dts: meson: g12a: add reset to tdm formatters arm64: dts: meson: g12a: audio clock controller provides resets arm64: dts: meson-sm1-sei610: enable DVFS arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap arm64: dts: meson-g12a-x96-max: add rc-x96max keymap arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap arm64: dts: meson-sm1-sei610: add USB support arm64: dts: meson-sm1-sei610: add HDMI display support arm64: dts: meson-g12: add Everything-Else power domain controller arm64: dts: meson: fix boards regulators states format arm64: dts: meson-gxbb-p201: fix snps, reset-delays-us format ... Link: https://patchwork.kernel.org/patch/11122331/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/g12a-clkc.h5
-rw-r--r--include/dt-bindings/power/meson-g12a-power.h13
-rw-r--r--include/dt-bindings/power/meson-sm1-power.h18
-rw-r--r--include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h38
4 files changed, 74 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h
index 8ccc29ac7a72..0837c1a7ae49 100644
--- a/include/dt-bindings/clock/g12a-clkc.h
+++ b/include/dt-bindings/clock/g12a-clkc.h
@@ -138,5 +138,10 @@
#define CLKID_VDEC_HEVCF 210
#define CLKID_TS 212
#define CLKID_CPUB_CLK 224
+#define CLKID_GP1_PLL 243
+#define CLKID_DSU_CLK 252
+#define CLKID_CPU1_CLK 253
+#define CLKID_CPU2_CLK 254
+#define CLKID_CPU3_CLK 255
#endif /* __G12A_CLKC_H */
diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
new file mode 100644
index 000000000000..bb5e67a842de
--- /dev/null
+++ b/include/dt-bindings/power/meson-g12a-power.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_G12A_POWER_H
+#define _DT_BINDINGS_MESON_G12A_POWER_H
+
+#define PWRC_G12A_VPU_ID 0
+#define PWRC_G12A_ETH_ID 1
+
+#endif
diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h
new file mode 100644
index 000000000000..a020ab00c134
--- /dev/null
+++ b/include/dt-bindings/power/meson-sm1-power.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_SM1_POWER_H
+#define _DT_BINDINGS_MESON_SM1_POWER_H
+
+#define PWRC_SM1_VPU_ID 0
+#define PWRC_SM1_NNA_ID 1
+#define PWRC_SM1_USB_ID 2
+#define PWRC_SM1_PCIE_ID 3
+#define PWRC_SM1_GE2D_ID 4
+#define PWRC_SM1_AUDIO_ID 5
+#define PWRC_SM1_ETH_ID 6
+
+#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
new file mode 100644
index 000000000000..14b78dabed0e
--- /dev/null
+++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ *
+ */
+
+#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
+#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
+
+#define AUD_RESET_PDM 0
+#define AUD_RESET_TDMIN_A 1
+#define AUD_RESET_TDMIN_B 2
+#define AUD_RESET_TDMIN_C 3
+#define AUD_RESET_TDMIN_LB 4
+#define AUD_RESET_LOOPBACK 5
+#define AUD_RESET_TODDR_A 6
+#define AUD_RESET_TODDR_B 7
+#define AUD_RESET_TODDR_C 8
+#define AUD_RESET_FRDDR_A 9
+#define AUD_RESET_FRDDR_B 10
+#define AUD_RESET_FRDDR_C 11
+#define AUD_RESET_TDMOUT_A 12
+#define AUD_RESET_TDMOUT_B 13
+#define AUD_RESET_TDMOUT_C 14
+#define AUD_RESET_SPDIFOUT 15
+#define AUD_RESET_SPDIFOUT_B 16
+#define AUD_RESET_SPDIFIN 17
+#define AUD_RESET_EQDRC 18
+#define AUD_RESET_RESAMPLE 19
+#define AUD_RESET_DDRARB 20
+#define AUD_RESET_POWDET 21
+#define AUD_RESET_TORAM 22
+#define AUD_RESET_TOACODEC 23
+#define AUD_RESET_TOHDMITX 24
+#define AUD_RESET_CLKTREE 25
+
+#endif