clk: imx: whitespace cleanup; no functional change

remove whitespace before TAB.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 73 insertions, 73 deletions

diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h
index c343894ce603..08ce4a7f5432 100644
--- a/include/dt-bindings/clock/imx6ul-clock.h
+++ b/include/dt-bindings/clock/imx6ul-clock.h
@@ -21,13 +21,13 @@
 #define IMX6UL_PLL5_BYPASS_SRC		8
 #define IMX6UL_PLL6_BYPASS_SRC		9
 #define IMX6UL_PLL7_BYPASS_SRC		10
-#define IMX6UL_CLK_PLL1 		11
-#define IMX6UL_CLK_PLL2 		12
-#define IMX6UL_CLK_PLL3 		13
-#define IMX6UL_CLK_PLL4 		14
-#define IMX6UL_CLK_PLL5 		15
-#define IMX6UL_CLK_PLL6 		16
-#define IMX6UL_CLK_PLL7 		17
+#define IMX6UL_CLK_PLL1			11
+#define IMX6UL_CLK_PLL2			12
+#define IMX6UL_CLK_PLL3			13
+#define IMX6UL_CLK_PLL4			14
+#define IMX6UL_CLK_PLL5			15
+#define IMX6UL_CLK_PLL6			16
+#define IMX6UL_CLK_PLL7			17
 #define IMX6UL_PLL1_BYPASS		18
 #define IMX6UL_PLL2_BYPASS		19
 #define IMX6UL_PLL3_BYPASS		20
@@ -37,7 +37,7 @@
 #define IMX6UL_PLL7_BYPASS		24
 #define IMX6UL_CLK_PLL1_SYS		25
 #define IMX6UL_CLK_PLL2_BUS		26
-#define IMX6UL_CLK_PLL3_USB_OTG 	27
+#define IMX6UL_CLK_PLL3_USB_OTG		27
 #define IMX6UL_CLK_PLL4_AUDIO		28
 #define IMX6UL_CLK_PLL5_VIDEO		29
 #define IMX6UL_CLK_PLL6_ENET		30
@@ -66,7 +66,7 @@
 #define IMX6UL_CLK_PLL2_198M		53
 #define IMX6UL_CLK_PLL3_80M		54
 #define IMX6UL_CLK_PLL3_60M		55
-#define IMX6UL_CLK_STEP 		56
+#define IMX6UL_CLK_STEP			56
 #define IMX6UL_CLK_PLL1_SW		57
 #define IMX6UL_CLK_AXI_ALT_SEL		58
 #define IMX6UL_CLK_AXI_SEL		59
@@ -78,7 +78,7 @@
 #define IMX6UL_CLK_USDHC2_SEL		65
 #define IMX6UL_CLK_BCH_SEL		66
 #define IMX6UL_CLK_GPMI_SEL		67
-#define IMX6UL_CLK_EIM_SLOW_SEL 	68
+#define IMX6UL_CLK_EIM_SLOW_SEL		68
 #define IMX6UL_CLK_SPDIF_SEL		69
 #define IMX6UL_CLK_SAI1_SEL		70
 #define IMX6UL_CLK_SAI2_SEL		71
@@ -105,9 +105,9 @@
 #define IMX6UL_CLK_LDB_DI1_DIV_SEL	92
 #define IMX6UL_CLK_ARM			93
 #define IMX6UL_CLK_PERIPH_CLK2		94
-#define IMX6UL_CLK_PERIPH2_CLK2 	95
+#define IMX6UL_CLK_PERIPH2_CLK2		95
 #define IMX6UL_CLK_AHB			96
-#define IMX6UL_CLK_MMDC_PODF 		97
+#define IMX6UL_CLK_MMDC_PODF		97
 #define IMX6UL_CLK_AXI_PODF		98
 #define IMX6UL_CLK_PERCLK		99
 #define IMX6UL_CLK_IPG			100
@@ -133,16 +133,16 @@
 #define IMX6UL_CLK_CAN_PODF		120
 #define IMX6UL_CLK_ECSPI_PODF		121
 #define IMX6UL_CLK_UART_PODF		122
-#define IMX6UL_CLK_ADC1 		123
-#define IMX6UL_CLK_ADC2 		124
+#define IMX6UL_CLK_ADC1			123
+#define IMX6UL_CLK_ADC2			124
 #define IMX6UL_CLK_AIPSTZ1		125
 #define IMX6UL_CLK_AIPSTZ2		126
 #define IMX6UL_CLK_AIPSTZ3		127
 #define IMX6UL_CLK_APBHDMA		128
 #define IMX6UL_CLK_ASRC_IPG		129
 #define IMX6UL_CLK_ASRC_MEM		130
-#define IMX6UL_CLK_GPMI_BCH_APB  	131
-#define IMX6UL_CLK_GPMI_BCH 		132
+#define IMX6UL_CLK_GPMI_BCH_APB		131
+#define IMX6UL_CLK_GPMI_BCH		132
 #define IMX6UL_CLK_GPMI_IO		133
 #define IMX6UL_CLK_GPMI_APB		134
 #define IMX6UL_CLK_CAAM_MEM		135
@@ -154,7 +154,7 @@
 #define IMX6UL_CLK_ECSPI3		141
 #define IMX6UL_CLK_ECSPI4		142
 #define IMX6UL_CLK_EIM			143
-#define IMX6UL_CLK_ENET  		144
+#define IMX6UL_CLK_ENET			144
 #define IMX6UL_CLK_ENET_AHB		145
 #define IMX6UL_CLK_EPIT1		146
 #define IMX6UL_CLK_EPIT2		147
@@ -166,63 +166,63 @@
 #define IMX6UL_CLK_GPT1_SERIAL		153
 #define IMX6UL_CLK_GPT2_BUS		154
 #define IMX6UL_CLK_GPT2_SERIAL		155
-#define IMX6UL_CLK_I2C1 		156
-#define IMX6UL_CLK_I2C2 		157
-#define IMX6UL_CLK_I2C3 		158
-#define IMX6UL_CLK_I2C4 		159
-#define IMX6UL_CLK_IOMUXC 		160
-#define IMX6UL_CLK_LCDIF_APB 		161
-#define IMX6UL_CLK_LCDIF_PIX 		162
-#define IMX6UL_CLK_MMDC_P0_FAST 	163
-#define IMX6UL_CLK_MMDC_P0_IPG  	164
-#define IMX6UL_CLK_OCOTP 		165
-#define IMX6UL_CLK_OCRAM 		166
-#define IMX6UL_CLK_PWM1 		167
-#define IMX6UL_CLK_PWM2 		168
-#define IMX6UL_CLK_PWM3 		169
-#define IMX6UL_CLK_PWM4 		170
-#define IMX6UL_CLK_PWM5 		171
-#define IMX6UL_CLK_PWM6 		172
-#define IMX6UL_CLK_PWM7 		173
-#define IMX6UL_CLK_PWM8 		174
-#define IMX6UL_CLK_PXP  		175
-#define IMX6UL_CLK_QSPI 		176
-#define IMX6UL_CLK_ROM  		177
-#define IMX6UL_CLK_SAI1 		178
-#define IMX6UL_CLK_SAI1_IPG 		179
-#define IMX6UL_CLK_SAI2 		180
-#define IMX6UL_CLK_SAI2_IPG 		181
-#define IMX6UL_CLK_SAI3 		182
-#define IMX6UL_CLK_SAI3_IPG 		183
-#define IMX6UL_CLK_SDMA 		184
-#define IMX6UL_CLK_SIM  		185
-#define IMX6UL_CLK_SIM_S 		186
-#define IMX6UL_CLK_SPBA 		187
-#define IMX6UL_CLK_SPDIF 		188
-#define IMX6UL_CLK_UART1_IPG 		189
-#define IMX6UL_CLK_UART1_SERIAL 	190
-#define IMX6UL_CLK_UART2_IPG 		191
-#define IMX6UL_CLK_UART2_SERIAL 	192
-#define IMX6UL_CLK_UART3_IPG 		193
-#define IMX6UL_CLK_UART3_SERIAL 	194
-#define IMX6UL_CLK_UART4_IPG 		195
-#define IMX6UL_CLK_UART4_SERIAL 	196
-#define IMX6UL_CLK_UART5_IPG 		197
-#define IMX6UL_CLK_UART5_SERIAL 	198
-#define IMX6UL_CLK_UART6_IPG 		199
-#define IMX6UL_CLK_UART6_SERIAL 	200
-#define IMX6UL_CLK_UART7_IPG 		201
-#define IMX6UL_CLK_UART7_SERIAL 	202
-#define IMX6UL_CLK_UART8_IPG 		203
-#define IMX6UL_CLK_UART8_SERIAL 	204
-#define IMX6UL_CLK_USBOH3 		205
-#define IMX6UL_CLK_USDHC1 		206
-#define IMX6UL_CLK_USDHC2 		207
-#define IMX6UL_CLK_WDOG1 		208
-#define IMX6UL_CLK_WDOG2 		209
-#define IMX6UL_CLK_WDOG3 		210
+#define IMX6UL_CLK_I2C1			156
+#define IMX6UL_CLK_I2C2			157
+#define IMX6UL_CLK_I2C3			158
+#define IMX6UL_CLK_I2C4			159
+#define IMX6UL_CLK_IOMUXC		160
+#define IMX6UL_CLK_LCDIF_APB		161
+#define IMX6UL_CLK_LCDIF_PIX		162
+#define IMX6UL_CLK_MMDC_P0_FAST		163
+#define IMX6UL_CLK_MMDC_P0_IPG		164
+#define IMX6UL_CLK_OCOTP		165
+#define IMX6UL_CLK_OCRAM		166
+#define IMX6UL_CLK_PWM1			167
+#define IMX6UL_CLK_PWM2			168
+#define IMX6UL_CLK_PWM3			169
+#define IMX6UL_CLK_PWM4			170
+#define IMX6UL_CLK_PWM5			171
+#define IMX6UL_CLK_PWM6			172
+#define IMX6UL_CLK_PWM7			173
+#define IMX6UL_CLK_PWM8			174
+#define IMX6UL_CLK_PXP			175
+#define IMX6UL_CLK_QSPI			176
+#define IMX6UL_CLK_ROM			177
+#define IMX6UL_CLK_SAI1			178
+#define IMX6UL_CLK_SAI1_IPG		179
+#define IMX6UL_CLK_SAI2			180
+#define IMX6UL_CLK_SAI2_IPG		181
+#define IMX6UL_CLK_SAI3			182
+#define IMX6UL_CLK_SAI3_IPG		183
+#define IMX6UL_CLK_SDMA			184
+#define IMX6UL_CLK_SIM			185
+#define IMX6UL_CLK_SIM_S		186
+#define IMX6UL_CLK_SPBA			187
+#define IMX6UL_CLK_SPDIF		188
+#define IMX6UL_CLK_UART1_IPG		189
+#define IMX6UL_CLK_UART1_SERIAL		190
+#define IMX6UL_CLK_UART2_IPG		191
+#define IMX6UL_CLK_UART2_SERIAL		192
+#define IMX6UL_CLK_UART3_IPG		193
+#define IMX6UL_CLK_UART3_SERIAL		194
+#define IMX6UL_CLK_UART4_IPG		195
+#define IMX6UL_CLK_UART4_SERIAL		196
+#define IMX6UL_CLK_UART5_IPG		197
+#define IMX6UL_CLK_UART5_SERIAL		198
+#define IMX6UL_CLK_UART6_IPG		199
+#define IMX6UL_CLK_UART6_SERIAL		200
+#define IMX6UL_CLK_UART7_IPG		201
+#define IMX6UL_CLK_UART7_SERIAL		202
+#define IMX6UL_CLK_UART8_IPG		203
+#define IMX6UL_CLK_UART8_SERIAL		204
+#define IMX6UL_CLK_USBOH3		205
+#define IMX6UL_CLK_USDHC1		206
+#define IMX6UL_CLK_USDHC2		207
+#define IMX6UL_CLK_WDOG1		208
+#define IMX6UL_CLK_WDOG2		209
+#define IMX6UL_CLK_WDOG3		210
 #define IMX6UL_CLK_LDB_DI0		211
-#define IMX6UL_CLK_AXI  		212
+#define IMX6UL_CLK_AXI			212
 #define IMX6UL_CLK_SPDIF_GCLK		213
 #define IMX6UL_CLK_GPT_3M		214
 #define IMX6UL_CLK_SIM2			215