diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-05-25 18:02:08 +0200 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-05-25 18:02:08 +0200 |
commit | 2c093cdb0a5e62d3303a759f4330e62b3e2f82ed (patch) | |
tree | 4f68df467883c82199acbbaed57e93c07c5b58a7 /include/dt-bindings | |
parent | 58c38116c6cc5bcb6d952ca72111a7a15d4604a2 (diff) | |
parent | c1eb8f83845b6ca9e53c41c26a4dff57597d4969 (diff) |
Merge tag 'phy-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.18
*) Add PHY driver for the ATH79 USB PHY
*) Add USB3 PHY driver for Mediatek XS-PHY
*) Add QUSB/QMP V3 USB3 PHY Support for Qualcomm's SDM845
*) Add runtime PM support for mapphone PHY driver
*) Allow phy_pm_runtime_xxx API calls to accept NULL
*) Other minor cleanups and fixes
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/phy/phy-qcom-qusb2.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/include/dt-bindings/phy/phy-qcom-qusb2.h b/include/dt-bindings/phy/phy-qcom-qusb2.h new file mode 100644 index 000000000000..5c5e4d800cac --- /dev/null +++ b/include/dt-bindings/phy/phy-qcom-qusb2.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_QCOM_PHY_QUSB2_H_ +#define _DT_BINDINGS_QCOM_PHY_QUSB2_H_ + +/* PHY HSTX TRIM bit values (24mA to 15mA) */ +#define QUSB2_V2_HSTX_TRIM_24_0_MA 0x0 +#define QUSB2_V2_HSTX_TRIM_23_4_MA 0x1 +#define QUSB2_V2_HSTX_TRIM_22_8_MA 0x2 +#define QUSB2_V2_HSTX_TRIM_22_2_MA 0x3 +#define QUSB2_V2_HSTX_TRIM_21_6_MA 0x4 +#define QUSB2_V2_HSTX_TRIM_21_0_MA 0x5 +#define QUSB2_V2_HSTX_TRIM_20_4_MA 0x6 +#define QUSB2_V2_HSTX_TRIM_19_8_MA 0x7 +#define QUSB2_V2_HSTX_TRIM_19_2_MA 0x8 +#define QUSB2_V2_HSTX_TRIM_18_6_MA 0x9 +#define QUSB2_V2_HSTX_TRIM_18_0_MA 0xa +#define QUSB2_V2_HSTX_TRIM_17_4_MA 0xb +#define QUSB2_V2_HSTX_TRIM_16_8_MA 0xc +#define QUSB2_V2_HSTX_TRIM_16_2_MA 0xd +#define QUSB2_V2_HSTX_TRIM_15_6_MA 0xe +#define QUSB2_V2_HSTX_TRIM_15_0_MA 0xf + +/* PHY PREEMPHASIS bit values */ +#define QUSB2_V2_PREEMPHASIS_NONE 0 +#define QUSB2_V2_PREEMPHASIS_5_PERCENT 1 +#define QUSB2_V2_PREEMPHASIS_10_PERCENT 2 +#define QUSB2_V2_PREEMPHASIS_15_PERCENT 3 + +/* PHY PREEMPHASIS-WIDTH bit values */ +#define QUSB2_V2_PREEMPHASIS_WIDTH_FULL_BIT 0 +#define QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT 1 + +#endif |