diff options
| author | Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> | 2020-06-29 15:00:52 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2020-06-29 18:48:00 +0530 |
| commit | cea0f76a483d1270ac6f6513964e3e75193dda48 (patch) | |
| tree | 77f90f9a47a6cdcd08892d317d2d33110846149a /include/dt-bindings/phy | |
| parent | dcbec046507615d7c4b5f6682dc11a1be9a2924c (diff) | |
dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY
Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed
Processing System Gigabit Transceiver which provides PHY capabilities to
USB, SATA, PCIE, Display Port and Ehernet SGMII controllers.
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200629120054.29338-2-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include/dt-bindings/phy')
| -rw-r--r-- | include/dt-bindings/phy/phy.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h index 3727ef72138b..36e8c241cf48 100644 --- a/include/dt-bindings/phy/phy.h +++ b/include/dt-bindings/phy/phy.h @@ -18,5 +18,6 @@ #define PHY_TYPE_UFS 5 #define PHY_TYPE_DP 6 #define PHY_TYPE_XPCS 7 +#define PHY_TYPE_SGMII 8 #endif /* _DT_BINDINGS_PHY */ |