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authorAmit Nischal <anischal@codeaurora.org>2018-11-25 10:06:07 +0530
committerStephen Boyd <sboyd@kernel.org>2018-11-27 16:24:44 -0800
commite431c92188a9b76c16707302a9fe848a70982c13 (patch)
tree1ced6bb9add815b7e5bebe95c9d269fd2d79a89b /include/dt-bindings/clock
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
dt-bindings: clock: Introduce QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SDM845 SoCs. Signed-off-by: Amit Nischal <anischal@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Add input clocks property] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/qcom,gpucc-sdm845.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gpucc-sdm845.h b/include/dt-bindings/clock/qcom,gpucc-sdm845.h
new file mode 100644
index 000000000000..9690d901b50a
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,gpucc-sdm845.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
+#define _DT_BINDINGS_CLK_SDM_GPU_CC_SDM845_H
+
+/* GPU_CC clock registers */
+#define GPU_CC_CX_GMU_CLK 0
+#define GPU_CC_CXO_CLK 1
+#define GPU_CC_GMU_CLK_SRC 2
+#define GPU_CC_PLL1 3
+
+/* GPU_CC Resets */
+#define GPUCC_GPU_CC_CX_BCR 0
+#define GPUCC_GPU_CC_GMU_BCR 1
+#define GPUCC_GPU_CC_XO_BCR 2
+
+/* GPU_CC GDSCRs */
+#define GPU_CX_GDSC 0
+#define GPU_GX_GDSC 1
+
+#endif