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authorXing Zheng <zhengxing@rock-chips.com>2016-06-21 12:59:47 +0800
committerHeiko Stuebner <heiko@sntech.de>2016-06-22 00:29:27 +0200
commit9ff59360b863706b50cbcd7ffad9287d67254063 (patch)
treec60c6b3016d20e7effc7ffce7241b81aaf215213 /include/dt-bindings/clock
parent5f6d71044f4d766c3636b9fd2c43e7c9d71d31af (diff)
clk: rockchip: add clock-ids for rk3228 MAC clocks
This patch exports related MAC clocks for dts reference. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/rk3228-cru.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index c992f3e50e25..b27e2b1a65e3 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -52,6 +52,15 @@
#define SCLK_EMMC_SAMPLE 121
#define SCLK_VOP 122
#define SCLK_HDMI_HDCP 123
+#define SCLK_MAC_SRC 124
+#define SCLK_MAC_EXTCLK 125
+#define SCLK_MAC 126
+#define SCLK_MAC_REFOUT 127
+#define SCLK_MAC_REF 128
+#define SCLK_MAC_RX 129
+#define SCLK_MAC_TX 130
+#define SCLK_MAC_PHY 131
+#define SCLK_MAC_OUT 132
/* dclk gates */
#define DCLK_VOP 190
@@ -61,6 +70,7 @@
#define ACLK_DMAC 194
#define ACLK_PERI 210
#define ACLK_VOP 211
+#define ACLK_GMAC 212
/* pclk gates */
#define PCLK_GPIO0 320
@@ -82,6 +92,7 @@
#define PCLK_PERI 363
#define PCLK_HDMI_CTRL 364
#define PCLK_HDMI_PHY 365
+#define PCLK_GMAC 367
/* hclk gates */
#define HCLK_I2S0_8CH 442