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| author | Stephen Boyd <sboyd@kernel.org> | 2020-07-21 00:58:07 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-07-21 00:58:07 -0700 |
| commit | bfd35bf9cebc3627fd010c1230e3da154369b016 (patch) | |
| tree | 4b91c4d1d83e00fe9b7289898d066dd12095e497 /include/dt-bindings/clock/bcm6318-clock.h | |
| parent | b3a9e3b9622ae10064826dccb4f7a52bd88c7407 (diff) | |
| parent | 2568528f55356a2f20f80a18244d3e235cbd2cab (diff) | |
Merge tag 'clk-meson-v5.9-1' of https://github.com/BayLibre/clk-meson into clk-amlogic
Pull Amlogic clk driver updates from Jerome Brunet:
- g12: add neural network accelerator clock sources
- meson8: remove critical flag for main PLL divider
- meson8: add video decoder clock gates
* tag 'clk-meson-v5.9-1' of https://github.com/BayLibre/clk-meson:
clk: meson: meson8b: add the vclk2_en gate clock
clk: meson: meson8b: add the vclk_en gate clock
clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
clk: meson: g12a: Add support for NNA CLK source clocks
dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs
Diffstat (limited to 'include/dt-bindings/clock/bcm6318-clock.h')
0 files changed, 0 insertions, 0 deletions