diff options
| author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2019-10-15 13:40:12 +0000 |
|---|---|---|
| committer | Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> | 2019-10-15 15:10:15 -0400 |
| commit | 1ccd5417dbfa77afb476b95c85fe2e43ada2bc0a (patch) | |
| tree | 7b629ec803345399ce7edb39efcbed2a8037cbd4 /include/drm | |
| parent | fadfee3f9d8f114435a8a3e9f83a227600d89de7 (diff) | |
drm: Add LT-tunable PHY repeater mode operations
LT-tunable PHY Repeaters can operate in two different modes: transparent
(default) and non-transparent. The value 0x55 specifies the transparent
mode, and 0xaa represents the non-transparent; this commit adds these
two values as definitions.
Cc: Abdoulaye Berthe <Abdoulaye.Berthe@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Abdoulaye Berthe <Abdoulaye.Berthe@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015134010.26zwopwnrbsmz5az@outlook.office365.com
Diffstat (limited to 'include/drm')
| -rw-r--r-- | include/drm/drm_dp_helper.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index bf62b43aaf2b..cfadeeef8492 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1034,6 +1034,10 @@ #define DP_SYMBOL_ERROR_COUNT_LANE3_PHY_REPEATER1 0xf003b /* 1.3 */ #define DP_FEC_STATUS_PHY_REPEATER1 0xf0290 /* 1.4 */ +/* Repeater modes */ +#define DP_PHY_REPEATER_MODE_TRANSPARENT 0x55 /* 1.3 */ +#define DP_PHY_REPEATER_MODE_NON_TRANSPARENT 0xaa /* 1.3 */ + /* DP HDCP message start offsets in DPCD address space */ #define DP_HDCP_2_2_AKE_INIT_OFFSET DP_HDCP_2_2_REG_RTX_OFFSET #define DP_HDCP_2_2_AKE_SEND_CERT_OFFSET DP_HDCP_2_2_REG_CERT_RX_OFFSET |