diff options
author | Kumar Gala <galak@freescale.com> | 2005-06-25 14:54:37 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-25 16:24:26 -0700 |
commit | 33d9e9b56d5ccd7776fdfe3ecce4a2793dee6fd3 (patch) | |
tree | e2ecb071823cc9ffe2755ed117bfabe04a35e1fc /include/asm-ppc/reg.h | |
parent | 62aa751d16399637325852bc0a1fcf13c2476dd7 (diff) |
[PATCH] ppc32: Add support for Freescale e200 (Book-E) core
The e200 core is a Book-E core (similar to e500) that has a unified L1 cache
and is not cache coherent on the bus. The e200 core also adds a separate
exception level for debug exceptions. Part of this patch helps to cleanup a
few cases that are true for all Freescale Book-E parts, not just e500.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc/reg.h')
-rw-r--r-- | include/asm-ppc/reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-ppc/reg.h b/include/asm-ppc/reg.h index c418aab7cd34..88b4222154d4 100644 --- a/include/asm-ppc/reg.h +++ b/include/asm-ppc/reg.h @@ -160,6 +160,7 @@ #define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */ #define HID0_DCI (1<<10) /* Data Cache Invalidate */ #define HID0_SPD (1<<9) /* Speculative disable */ +#define HID0_DAPUEN (1<<8) /* Debug APU enable */ #define HID0_SGE (1<<7) /* Store Gathering Enable */ #define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ #define HID0_DFCA (1<<6) /* Data Cache Flush Assist */ |