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authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 16:41:27 -0800
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-01 16:41:27 -0800
commit72a73a69f6a79266b8b4b18f796907b73a5c01e3 (patch)
tree7684193f3c7f21b0ca14c430b8ead75b2c2025eb /include/asm-powerpc
parent4549df891a31b9a05b7d183106c09049b79327be (diff)
parent2b290da053608692ea206507d993b70c39d2cdea (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits) PCI: make arch/i386/pci/common.c:pci_bf_sort static PCI: ibmphp_pci.c: fix NULL dereference pciehp: remove unnecessary pci_disable_msi pciehp: remove unnecessary free_irq PCI: rpaphp: change device tree examination PCI: Change memory allocation for acpiphp slots i2c-i801: SMBus patch for Intel ICH9 PCI: irq: irq and pci_ids patch for Intel ICH9 PCI: pci_{enable,disable}_device() nestable ports PCI: switch pci_{enable,disable}_device() to be nestable PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmap pci/i386: style cleanups PCI: Block on access to temporarily unavailable pci device pci: fix __pci_register_driver error handling pci: clear osc support flags if no _OSC method acpiphp: fix missing acpiphp_glue_exit() acpiphp: fix use of list_for_each macro Altix: Initial ACPI support - ROM shadowing. Altix: SN ACPI hotplug support. Altix: Add initial ACPI IO support ...
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/pci.h20
1 files changed, 7 insertions, 13 deletions
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index 46afd29b904e..721c97f09b20 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -62,19 +62,13 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
}
#ifdef CONFIG_PPC64
-#define HAVE_ARCH_PCI_MWI 1
-static inline int pcibios_prep_mwi(struct pci_dev *dev)
-{
- /*
- * We would like to avoid touching the cacheline size or MWI bit
- * but we cant do that with the current pcibios_prep_mwi
- * interface. pSeries firmware sets the cacheline size (which is not
- * the cpu cacheline size in all cases) and hardware treats MWI
- * the same as memory write. So we dont touch the cacheline size
- * here and allow the generic code to set the MWI bit.
- */
- return 0;
-}
+
+/*
+ * We want to avoid touching the cacheline size or MWI bit.
+ * pSeries firmware sets the cacheline size (which is not the cpu cacheline
+ * size in all cases) and hardware treats MWI the same as memory write.
+ */
+#define PCI_DISABLE_MWI
extern struct dma_mapping_ops pci_dma_ops;