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authorRoland Dreier <rolandd@cisco.com>2007-06-18 09:23:47 -0700
committerRoland Dreier <rolandd@cisco.com>2007-06-18 09:23:47 -0700
commite61ef2416b0b92828512b6cfcd0104a02b6431fe (patch)
tree51d3307aa5be5591f5859f96a3bd1dd20231b9b0 /include/asm-ia64/cyclone.h
parent5ae2a7a836be660ff1621cce1c46930f19200589 (diff)
IB/mlx4: Make sure inline data segments don't cross a 64 byte boundary
Inline data segments in send WQEs are not allowed to cross a 64 byte boundary. We use inline data segments to hold the UD headers for MLX QPs (QP0 and QP1). A send with GRH on QP1 will have a UD header that is too big to fit in a single inline data segment without crossing a 64 byte boundary, so split the header into two inline data segments. Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'include/asm-ia64/cyclone.h')
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