diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-12-08 15:22:20 +0000 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-08 16:05:26 +0000 |
commit | efe90d273b6f365d37c0f82fbbd68a40982c3265 (patch) | |
tree | a065719ebabfd6fa8b41e5a01fc5ff0c7ad3e80c /include/asm-arm | |
parent | c99767974ebd2a719d849fdeaaa1674456f5283f (diff) |
[ARM] Handle HWCAP_VFP in VFP support code
Don't set HWCAP_VFP in the processor support file; not only does it
depend on the processor features, but it also depends on the support
code being present. Therefore, only set it if the support code
detects that we have a VFP coprocessor attached.
Also, move the VFP handling of the coprocessor access register into
the VFP support code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/system.h | 43 |
1 files changed, 30 insertions, 13 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index f05fbe31576c..f60faccf01fa 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -139,19 +139,36 @@ static inline int cpu_is_xsc3(void) #define cpu_is_xscale() 1 #endif -#define set_cr(x) \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c1, c0, 0 @ set CR" \ - : : "r" (x) : "cc") - -#define get_cr() \ - ({ \ - unsigned int __val; \ - __asm__ __volatile__( \ - "mrc p15, 0, %0, c1, c0, 0 @ get CR" \ - : "=r" (__val) : : "cc"); \ - __val; \ - }) +static inline unsigned int get_cr(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); + return val; +} + +static inline void set_cr(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" + : : "r" (val) : "cc"); +} + +#define CPACC_FULL(n) (3 << (n * 2)) +#define CPACC_SVC(n) (1 << (n * 2)) +#define CPACC_DISABLE(n) (0 << (n * 2)) + +static inline unsigned int get_copro_access(void) +{ + unsigned int val; + asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" + : "=r" (val) : : "cc"); + return val; +} + +static inline void set_copro_access(unsigned int val) +{ + asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" + : : "r" (val) : "cc"); +} extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ extern unsigned long cr_alignment; /* defined in entry-armv.S */ |