diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-27 19:13:56 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-27 19:13:56 -0700 |
| commit | 936813a8807c5684c6a97f1081b31027403d4a93 (patch) | |
| tree | bc3a1343ea1548195ab4e5dd11b1830f8b9cc52b /include/asm-arm | |
| parent | 73a0e405dce7d720808536b708f7c738b413b1a2 (diff) | |
| parent | 6a93096195305f6f2a39544a034e77e2e74d5799 (diff) | |
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6:
[MTD] NAND: Select chip before checking write protect status
[MTD] CORE mtdchar.c: fix off-by-one error in lseek()
[MTD] NAND: Fix typo in mtd/nand/ts7250.c
[JFFS2][XATTR] coexistence between xattr and write buffering support.
[JFFS2][XATTR] Fix wrong copyright
[JFFS2][XATTR] Re-define xd->refcnt as atomic_t
[JFFS2][XATTR] Fix memory leak with jffs2_xattr_ref
[JFFS2][XATTR] rid unnecessary writing of delete marker.
[JFFS2][XATTR] Fix ACL bug when updating null xattr by null ACL.
[JFFS2][XATTR] using 'delete marker' for xdatum/xref deletion
[MTD] Fix off-by-one error in physmap.c
[MTD] Remove unused 'nr_banks' variable from ixp2000 map driver
[MTD NAND] s3c2412 support in s3c2410.c
[MTD] Initialize 'writesize'
[MTD] NAND: ndfc fix address offset thinko
[MTD] NAND: S3C2410 convert prinks to dev_*()s
[MTD] NAND: Missing fixups
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-nand.h | 48 |
1 files changed, 47 insertions, 1 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h index 7cff235e667a..c1470c695c33 100644 --- a/include/asm-arm/arch-s3c2410/regs-nand.h +++ b/include/asm-arm/arch-s3c2410/regs-nand.h @@ -39,10 +39,19 @@ #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28) #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C) #define S3C2440_NFMECC1 S3C2410_NFREG(0x30) -#define S3C2440_NFSECC S3C2410_NFREG(0x34) +#define S3C2440_NFSECC S3C24E10_NFREG(0x34) #define S3C2440_NFSBLK S3C2410_NFREG(0x38) #define S3C2440_NFEBLK S3C2410_NFREG(0x3C) +#define S3C2412_NFSBLK S3C2410_NFREG(0x20) +#define S3C2412_NFEBLK S3C2410_NFREG(0x24) +#define S3C2412_NFSTAT S3C2410_NFREG(0x28) +#define S3C2412_NFMECC_ERR0 S3C2410_NFREG(0x2C) +#define S3C2412_NFMECC_ERR1 S3C2410_NFREG(0x30) +#define S3C2412_NFMECC0 S3C2410_NFREG(0x34) +#define S3C2412_NFMECC1 S3C2410_NFREG(0x38) +#define S3C2412_NFSECC S3C2410_NFREG(0x3C) + #define S3C2410_NFCONF_EN (1<<15) #define S3C2410_NFCONF_512BYTE (1<<14) #define S3C2410_NFCONF_4STEP (1<<13) @@ -77,5 +86,42 @@ #define S3C2440_NFSTAT_RnB_CHANGE (1<<2) #define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3) +#define S3C2412_NFCONF_NANDBOOT (1<<31) +#define S3C2412_NFCONF_ECCCLKCON (1<<30) +#define S3C2412_NFCONF_ECC_MLC (1<<24) +#define S3C2412_NFCONF_TACLS_MASK (7<<12) /* 1 extra bit of Tacls */ + +#define S3C2412_NFCONT_ECC4_DIRWR (1<<18) +#define S3C2412_NFCONT_LOCKTIGHT (1<<17) +#define S3C2412_NFCONT_SOFTLOCK (1<<16) +#define S3C2412_NFCONT_ECC4_ENCINT (1<<13) +#define S3C2412_NFCONT_ECC4_DECINT (1<<12) +#define S3C2412_NFCONT_MAIN_ECC_LOCK (1<<7) +#define S3C2412_NFCONT_INIT_MAIN_ECC (1<<5) +#define S3C2412_NFCONT_nFCE1 (1<<2) +#define S3C2412_NFCONT_nFCE0 (1<<1) + +#define S3C2412_NFSTAT_ECC_ENCDONE (1<<7) +#define S3C2412_NFSTAT_ECC_DECDONE (1<<6) +#define S3C2412_NFSTAT_ILLEGAL_ACCESS (1<<5) +#define S3C2412_NFSTAT_RnB_CHANGE (1<<4) +#define S3C2412_NFSTAT_nFCE1 (1<<3) +#define S3C2412_NFSTAT_nFCE0 (1<<2) +#define S3C2412_NFSTAT_Res1 (1<<1) +#define S3C2412_NFSTAT_READY (1<<0) + +#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf) +#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7) +#define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff) +#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7) +#define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3) +#define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3) +#define S3C2412_NFECCERR_NONE (0) +#define S3C2412_NFECCERR_1BIT (1) +#define S3C2412_NFECCERR_MULTIBIT (2) +#define S3C2412_NFECCERR_ECCAREA (3) + + + #endif /* __ASM_ARM_REGS_NAND */ |