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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-07 17:00:53 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-07 17:00:53 -0700 |
| commit | 1077682b2f97cee76a79cf38bab3fa022a97d9f8 (patch) | |
| tree | e0e7dff35e3f38b9e360e702903e132c991f3f22 /include/asm-arm/arch-omap/board-innovator.h | |
| parent | dc9ca2af4917ce4e545fa3eb1d845c555128cabc (diff) | |
| parent | bafa49cc1b800df4748b29e2b038ff029d7c8747 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include/asm-arm/arch-omap/board-innovator.h')
| -rw-r--r-- | include/asm-arm/arch-omap/board-innovator.h | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h index 0f1abaefe4de..79574e0ed13d 100644 --- a/include/asm-arm/arch-omap/board-innovator.h +++ b/include/asm-arm/arch-omap/board-innovator.h @@ -36,31 +36,6 @@ #define OMAP1510P1_EMIFS_PRI_VALUE 0x00 #define OMAP1510P1_EMIFF_PRI_VALUE 0x00 -/* - * These definitions define an area of FLASH set aside - * for the use of MTD/JFFS2. This is the area of flash - * that a JFFS2 filesystem will reside which is mounted - * at boot with the "root=/dev/mtdblock/0 rw" - * command line option. The flash address used here must - * fall within the legal range defined by rrload for storing - * the filesystem component. This address will be sufficiently - * deep into the overall flash range to avoid the other - * components also stored in flash such as the bootloader, - * the bootloader params, and the kernel. - * The SW2 settings for the map below are: - * 1 off, 2 off, 3 on, 4 off. - */ - -/* Intel flash_0, partitioned as expected by rrload */ -#define OMAP_FLASH_0_BASE 0xD8000000 -#define OMAP_FLASH_0_START 0x00000000 -#define OMAP_FLASH_0_SIZE SZ_16M - -/* Intel flash_1, used for cramfs or other flash file systems */ -#define OMAP_FLASH_1_BASE 0xD9000000 -#define OMAP_FLASH_1_START 0x01000000 -#define OMAP_FLASH_1_SIZE SZ_16M - #define NR_FPGA_IRQS 24 #define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS |