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authorThierry Reding <treding@nvidia.com>2019-12-09 13:00:03 +0100
committerBen Skeggs <bskeggs@redhat.com>2020-01-15 10:49:59 +1000
commit6992ceb8c0f6f8e2f4374a1ab4dd84cd76cc4b64 (patch)
treec6468fa10020c4d0ebbc12d9faf21e9ea3dbea02 /fs
parentfc12262b96833ce131063c7081cd7fb3c4a048f3 (diff)
drm/nouveau/secboot/gm20b,gp10b: Read WPR configuration from GPU registers
The GPUs found on Tegra SoCs have registers that can be used to read the WPR configuration. Use these registers instead of reaching into the memory controller's register space to read the same information. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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