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authormike.travis@hpe.com <mike.travis@hpe.com>2017-10-12 11:32:05 -0500
committerThomas Gleixner <tglx@linutronix.de>2017-10-16 22:50:37 +0200
commit6c66350d0a482892793b888b07c1177fc6d4b344 (patch)
tree8fedc0ec845df896ee11b0fa0715bf4fb8d8fb2a /fs/sysv
parent41e7864ab5ce4ec36e89a9f55d8d9dfe19b0392c (diff)
x86/tsc: Provide a means to disable TSC ART
On systems where multiple chassis are reset asynchronously, and thus the TSC counters are started asynchronously, the offset needed to convert to TSC to ART would be different. Disable ART in that case and rely on the TSC counters to supply the accurate time. Signed-off-by: Mike Travis <mike.travis@hpe.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Dimitri Sivanich <dimitri.sivanich@hpe.com> Cc: Russ Anderson <russ.anderson@hpe.com> Cc: Andrew Banman <andrew.banman@hpe.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Bin Gao <bin.gao@linux.intel.com> Link: https://lkml.kernel.org/r/20171012163202.289397994@stormcage.americas.sgi.com
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