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authorBruce Allan <bruce.w.allan@intel.com>2010-08-03 11:48:35 +0000
committerDavid S. Miller <davem@davemloft.net>2010-08-03 16:40:53 -0700
commit96f2bd13bfb6df5beec7fe55405ad94b528b8b4c (patch)
tree6318e04d96d8f18bb0a39be9d7e2273c7a97637b /fs/cifs
parent5c7bf2f4d6304ab4741f38365ca0c0223147263d (diff)
e1000e: correct MAC-PHY interconnect register offset for 82579
The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'fs/cifs')
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