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author | Vignesh R <vigneshr@ti.com> | 2017-10-03 10:49:23 +0530 |
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committer | Cyrille Pitchen <cyrille.pitchen@wedev4u.fr> | 2017-10-17 20:40:22 +0200 |
commit | e2580a4add6b061f1cc9d7bf9bac5a643112d744 (patch) | |
tree | 07d1343c267eb6da54a1c26ce41efa20c2436f85 /firmware | |
parent | 00df263560673cefe3341275990324730d4791d5 (diff) |
mtd: spi-nor: cadence-quadspi: Add support to enable loop-back clock circuit
Cadence QSPI IP has a adapted loop-back circuit which can be enabled by
setting BYPASS field to 0 in READCAPTURE register. It enables use of
QSPI return clock to latch the data rather than the internal QSPI
reference clock. For high speed operations, adapted loop-back circuit
using QSPI return clock helps to increase data valid window.
Based on DT parameter cdns,rclk-en enable adapted loop-back circuit
for boards which do have QSPI return clock provided.
This patch also modifies cqspi_readdata_capture() function's bypass
parameter to bool to match how its used in the function.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Diffstat (limited to 'firmware')
0 files changed, 0 insertions, 0 deletions