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authorstephen hemminger <shemminger@vyatta.com>2011-11-16 13:42:56 +0000
committerDavid S. Miller <davem@davemloft.net>2011-11-16 20:27:09 -0500
commitf9687c44d322ca1bcbc362c8a54084425fda3ab8 (patch)
treeeb301db237c299e89919224cc1d95478dd917463 /drivers
parent1401a8008a09e079236261be37e98847c799760a (diff)
sky2: pci posting issues
A couple of the reset and setup paths have possible PCI posting issues. When setting registers, a read is necessary to force the writes to complete. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/marvell/sky2.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c
index f9c4529299bd..98ad38a5588f 100644
--- a/drivers/net/ethernet/marvell/sky2.c
+++ b/drivers/net/ethernet/marvell/sky2.c
@@ -869,6 +869,7 @@ static void sky2_wol_init(struct sky2_port *sky2)
/* block receiver */
sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
+ sky2_read32(hw, B0_CTST);
}
static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
@@ -2045,6 +2046,8 @@ static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
+
+ sky2_read32(hw, B0_CTST);
}
static void sky2_hw_down(struct sky2_port *sky2)