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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2018-11-23 16:30:20 +0200
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2019-01-14 03:51:23 +0200
commitf41cb153e6faf0d1f4bbe0b0f15aa20de1e43e90 (patch)
treee6be0b4a38a5236c30eb14902990cbcf0b5f3425 /drivers
parent90b5f679ef16e7461a2ff4ea11495541a5f6fe93 (diff)
drm: rcar-du: dw-hdmi: Reject modes with a too high clock frequency
Implement a .mode_valid() handler in the R-Car glue layer to reject modes with an unsupported clock frequency. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
index 75490a3e0a2a..603bb340e8cf 100644
--- a/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
+++ b/drivers/gpu/drm/rcar-du/rcar_dw_hdmi.c
@@ -35,6 +35,20 @@ static const struct rcar_hdmi_phy_params rcar_hdmi_phy_params[] = {
{ ~0UL, 0x0000, 0x0000, 0x0000 },
};
+static enum drm_mode_status
+rcar_hdmi_mode_valid(struct drm_connector *connector,
+ const struct drm_display_mode *mode)
+{
+ /*
+ * The maximum supported clock frequency is 297 MHz, as shown in the PHY
+ * parameters table.
+ */
+ if (mode->clock > 297000)
+ return MODE_CLOCK_HIGH;
+
+ return MODE_OK;
+}
+
static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi,
const struct dw_hdmi_plat_data *pdata,
unsigned long mpixelclock)
@@ -59,6 +73,7 @@ static int rcar_hdmi_phy_configure(struct dw_hdmi *hdmi,
}
static const struct dw_hdmi_plat_data rcar_dw_hdmi_plat_data = {
+ .mode_valid = rcar_hdmi_mode_valid,
.configure_phy = rcar_hdmi_phy_configure,
};