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authorJohn Keeping <john@metanate.com>2017-02-24 12:54:57 +0000
committerSean Paul <seanpaul@chromium.org>2017-03-01 14:48:55 -0500
commitefe83cee34472c787df7a0a0ef66967f6096bef5 (patch)
tree3fcd8d6e4b5f66d4ba38b611bab130c429466139 /drivers
parent1bef24bae2ed4d9eabc5cde33e293b2fe95796ef (diff)
drm/rockchip: dw-mipi-dsi: ensure PHY is reset
Also don't power up the DSI host at this point since this is not necessary in order to configure the PHY and we do so later when selecting video or command mode. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Chris Zhong <zyw@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-15-john@metanate.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/rockchip/dw-mipi-dsi.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 0f9be41f0361..78d676b7e516 100644
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -397,7 +397,10 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
return testdin;
}
- dsi_write(dsi, DSI_PWR_UP, POWERUP);
+ /* Start by clearing PHY state */
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR);
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR);
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR);
dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
VCO_RANGE_CON_SEL(vco) |