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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2016-02-16 10:25:11 +0100
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2016-02-16 11:25:09 +0100
commite8788cbc32dd90a12c3b1264efb9b36ad953953c (patch)
treefde8c1402eadfdd7cda747e63d05b97fda466671 /drivers
parente2c8b8701e2d0cb5b89fa3b5c8acae9dc4f76259 (diff)
drm/i915: Fix some minor issues with atomic cdclk.
The check for active_crtcs == 0 was performed by the callers, when changing the patches I forgot to remove those hunks. This resulted in skylake scalers still not having the correct cdclk to calculate scaling when all crtc's were dpms off. Fixes: 1a617b77658e ("drm/i915: Keep track of the cdclk as if all crtc's were active.") Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1455614711-9045-1-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ec36c65f2a00..568eefc7cc62 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6043,8 +6043,7 @@ static int broxton_calc_cdclk(struct drm_i915_private *dev_priv,
return 144000;
}
-/* Compute the max pixel clock for new configuration. Uses atomic state if
- * that's non-NULL, look at current state otherwise. */
+/* Compute the max pixel clock for new configuration. */
static int intel_mode_max_pixclk(struct drm_device *dev,
struct drm_atomic_state *state)
{
@@ -6067,9 +6066,6 @@ static int intel_mode_max_pixclk(struct drm_device *dev,
intel_state->min_pixclk[i] = pixclk;
}
- if (!intel_state->active_crtcs)
- return 0;
-
for_each_pipe(dev_priv, pipe)
max_pixclk = max(intel_state->min_pixclk[pipe], max_pixclk);
@@ -9681,9 +9677,6 @@ static int ilk_max_pixel_rate(struct drm_atomic_state *state)
intel_state->min_pixclk[i] = pixel_rate;
}
- if (!intel_state->active_crtcs)
- return 0;
-
for_each_pipe(dev_priv, pipe)
max_pixel_rate = max(intel_state->min_pixclk[pipe], max_pixel_rate);
@@ -13221,6 +13214,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
if (ret < 0)
return ret;
+
+ DRM_DEBUG_KMS("New cdclk calculated to be atomic %u, actual %u\n",
+ intel_state->cdclk, intel_state->dev_cdclk);
} else
to_intel_atomic_state(state)->cdclk = dev_priv->atomic_cdclk_freq;