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authorEric Huang <JinHuiEric.Huang@amd.com>2016-05-12 14:41:04 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-13 15:32:36 -0400
commite2ed8a132a70dc61ef6d9979bec4f37a3abbba4b (patch)
tree2c3a0a796661ea14375f1e9e38810ce58475fa43 /drivers
parentbd6080d662f08b4c4540c4e3735f0738cab7004f (diff)
drm/amd/powerplay: fix a bug on updating sclk for Tonga
Update sclk smc table rather than mclk smc table for sclk updates. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
index 1faad92b50d3..cb2833527404 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
@@ -5445,7 +5445,7 @@ static int tonga_populate_and_upload_sclk_mclk_dpm_levels(struct pp_hwmgr *hwmgr
}
if (data->need_update_smu7_dpm_table & (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
- result = tonga_populate_all_memory_levels(hwmgr);
+ result = tonga_populate_all_graphic_levels(hwmgr);
PP_ASSERT_WITH_CODE((0 == result),
"Failed to populate SCLK during PopulateNewDPMClocksStates Function!",
return result);