diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2020-01-15 06:34:21 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2020-01-15 10:50:27 +1000 |
commit | c9af47bcbde4d3eef3e68c69a29c580e0301a416 (patch) | |
tree | a0c61d44ba78aae67d05672b9418058066d9ebf6 /drivers | |
parent | 555a0002d3c6d0792df4df33a8a2d7140bc61812 (diff) |
drm/nouveau/sec2: move interrupt handler to hw-specific module
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c | 1 |
4 files changed, 31 insertions, 21 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c index f4cf682786c9..bb79488f414d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/base.c @@ -26,27 +26,6 @@ #include <subdev/top.h> static void -nvkm_sec2_intr(struct nvkm_engine *engine) -{ - struct nvkm_sec2 *sec2 = nvkm_sec2(engine); - struct nvkm_subdev *subdev = &sec2->engine.subdev; - struct nvkm_falcon *falcon = &sec2->falcon; - u32 disp = nvkm_falcon_rd32(falcon, 0x01c); - u32 intr = nvkm_falcon_rd32(falcon, 0x008) & disp & ~(disp >> 16); - - if (intr & 0x00000040) { - schedule_work(&sec2->work); - nvkm_falcon_wr32(falcon, 0x004, 0x00000040); - intr &= ~0x00000040; - } - - if (intr) { - nvkm_error(subdev, "unhandled intr %08x\n", intr); - nvkm_falcon_wr32(falcon, 0x004, intr); - } -} - -static void nvkm_sec2_recv(struct work_struct *work) { struct nvkm_sec2 *sec2 = container_of(work, typeof(*sec2), work); @@ -60,6 +39,13 @@ nvkm_sec2_recv(struct work_struct *work) nvkm_msgqueue_recv(sec2->queue); } +static void +nvkm_sec2_intr(struct nvkm_engine *engine) +{ + struct nvkm_sec2 *sec2 = nvkm_sec2(engine); + sec2->func->intr(sec2); +} + static int nvkm_sec2_fini(struct nvkm_engine *engine, bool suspend) { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c index 75407cb8a88a..c6919f2886de 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp102.c @@ -26,6 +26,25 @@ static const struct nvkm_acr_lsf_func gp102_sec2_acr_0 = { }; +void +gp102_sec2_intr(struct nvkm_sec2 *sec2) +{ + struct nvkm_subdev *subdev = &sec2->engine.subdev; + struct nvkm_falcon *falcon = &sec2->falcon; + u32 disp = nvkm_falcon_rd32(falcon, 0x01c); + u32 intr = nvkm_falcon_rd32(falcon, 0x008) & disp & ~(disp >> 16); + + if (intr & 0x00000040) { + schedule_work(&sec2->work); + nvkm_falcon_wr32(falcon, 0x004, 0x00000040); + intr &= ~0x00000040; + } + + if (intr) { + nvkm_error(subdev, "unhandled intr %08x\n", intr); + nvkm_falcon_wr32(falcon, 0x004, intr); + } +} static const struct nvkm_falcon_func gp102_sec2_flcn = { @@ -44,6 +63,7 @@ gp102_sec2_flcn = { const struct nvkm_sec2_func gp102_sec2 = { .flcn = &gp102_sec2_flcn, + .intr = gp102_sec2_intr, }; MODULE_FIRMWARE("nvidia/gp102/sec2/desc.bin"); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h index 6e28b969573b..e5ba6df3d500 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/priv.h @@ -5,8 +5,11 @@ struct nvkm_sec2_func { const struct nvkm_falcon_func *flcn; + void (*intr)(struct nvkm_sec2 *); }; +void gp102_sec2_intr(struct nvkm_sec2 *); + struct nvkm_sec2_fwif { int version; int (*load)(struct nvkm_sec2 *, int ver, const struct nvkm_sec2_fwif *); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c index 5192b3a1e40c..e3eb08f4e9a1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c @@ -38,6 +38,7 @@ tu102_sec2_flcn = { static const struct nvkm_sec2_func tu102_sec2 = { .flcn = &tu102_sec2_flcn, + .intr = gp102_sec2_intr, }; static int |