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authorRaanan Avargil <raanan.avargil@intel.com>2015-12-22 15:35:03 +0200
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2016-02-24 14:47:12 -0800
commitc26f40daf4e32f970b8337a88b65a8d00332ae6f (patch)
tree41c0e8b6c3ce68bb4a24a47c7979d5ab01a24b60 /drivers
parent74f31299a41e729226d60426087592b6790f22b7 (diff)
e1000e: Set HW FIFO minimum pointer gap for non-gig speeds
Based on feedback from HW team, the configured value of the internal PHY HW FIFO pointer gap was incorrect for non-gig speeds. This patch provides the correct configuration. Signed-off-by: Raanan Avargil <raanan.avargil@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 786d2148dd67..e7ccf5ffa835 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -1479,6 +1479,18 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
hw->phy.ops.release(hw);
if (ret_val)
return ret_val;
+ } else {
+ ret_val = hw->phy.ops.acquire(hw);
+ if (ret_val)
+ return ret_val;
+
+ ret_val = e1e_wphy_locked(hw,
+ PHY_REG(776, 20),
+ 0xC023);
+ hw->phy.ops.release(hw);
+ if (ret_val)
+ return ret_val;
+
}
}
}