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authorMihail Atanassov <mihail.atanassov@arm.com>2017-02-15 14:00:15 +0000
committerLiviu Dudau <Liviu.Dudau@arm.com>2017-03-10 14:31:09 +0000
commit9a8b0a230aca55ee142fd76f4765f1da1799da93 (patch)
tree57d0e2983b9d37b6d3c045b383c3d771667f8bd5 /drivers
parent3f81e1340706e9a7f854808e2f580c3106805d0c (diff)
drm: mali-dp: Remove mclk rate management
The rate of mclk depends on the use-case. If no downscaling is required, then mclk == pxlclk is a valid option; with downscaling however, the rate at which mclk runs determines how much a plane can be downscaled before composition. This is a system integration + power management issue that is more suited to firmware rather than this driver. Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/arm/malidp_crtc.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c
index 08e6a71f5d05..294b53697334 100644
--- a/drivers/gpu/drm/arm/malidp_crtc.c
+++ b/drivers/gpu/drm/arm/malidp_crtc.c
@@ -63,8 +63,7 @@ static void malidp_crtc_enable(struct drm_crtc *crtc)
clk_prepare_enable(hwdev->pxlclk);
- /* mclk needs to be set to the same or higher rate than pxlclk */
- clk_set_rate(hwdev->mclk, crtc->state->adjusted_mode.crtc_clock * 1000);
+ /* We rely on firmware to set mclk to a sensible level. */
clk_set_rate(hwdev->pxlclk, crtc->state->adjusted_mode.crtc_clock * 1000);
hwdev->modeset(hwdev, &vm);