diff options
| author | Prike Liang <Prike.Liang@amd.com> | 2019-08-02 15:32:57 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-22 17:40:58 -0500 |
| commit | 8db63b7c38217df3dc5501ca0371a58bd912c9ea (patch) | |
| tree | 71e01f7d0282ca7717b4eb9eb1eb88d69b05a927 /drivers | |
| parent | e2ef3b70e857ace2a52d542974326a521bc8d467 (diff) | |
drm/amdgpu: enable DF clock gating for rn
Enable DF clock gating during DF IP early init.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 50242384a163..c367b5f1b395 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -1172,7 +1172,8 @@ static int soc15_common_early_init(void *handle) AMD_CG_SUPPORT_VCN_MGCG | AMD_CG_SUPPORT_IH_CG | AMD_CG_SUPPORT_ATHUB_LS | - AMD_CG_SUPPORT_ATHUB_MGCG; + AMD_CG_SUPPORT_ATHUB_MGCG | + AMD_CG_SUPPORT_DF_MGCG; adev->pg_flags = 0; adev->external_rev_id = adev->rev_id + 0x91; |