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authorChristian König <christian.koenig@amd.com>2015-05-05 16:36:01 +0200
committerAlex Deucher <alexander.deucher@amd.com>2015-06-03 21:03:59 -0400
commit86fa0bdc6fd7b2debc07ce86f1bcd5fb254822e3 (patch)
tree77fcf046498a4d2995cf0668fbfd30700281dfb9 /drivers
parentfaad24cf2372794759b40085aeb3a2504f3fa0c2 (diff)
drm/amdgpu: add HEVC/H.265 UVD support
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 375759c8639c..2f7a5efa21c2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -460,6 +460,14 @@ static int amdgpu_uvd_cs_msg_decode(uint32_t *msg, unsigned buf_sizes[])
min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64);
break;
+ case 16: /* H265 */
+ image_size = (ALIGN(width, 16) * ALIGN(height, 16) * 3) / 2;
+ image_size = ALIGN(image_size, 256);
+
+ num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2;
+ min_dpb_size = image_size * num_dpb_buffer;
+ break;
+
default:
DRM_ERROR("UVD codec not handled %d!\n", stream_type);
return -EINVAL;